The semiconductor integrated circuit (IC) industry has experienced exponential growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of processing and manufacturing ICs and, for these advancements to be realized, similar developments in IC processing and manufacturing are needed.
One advancement implemented in some IC designs has been the replacement of the typically polysilicon gate electrode with a metal gate electrode to improve device performance with the decreased feature sizes. One process of forming a metal gate electrode is termed a replacement-gate or “gate-last” process in which the metal gate electrode is fabricated “last,” by replacing a polysilicon gate. This allows for reduced number of subsequent processes, including high temperature processing, that is performed after the formation of the final gate. However, there are challenges to implementing such IC fabrication processes, especially with scaled down IC features in advanced process nodes, such as 20 nanometer (nm), 16 nm, and beyond. For example, different areas of an IC may have different gate lengths and/or undergo different fabrication steps between the formation of the gates and the replacement of the gates with metal gates. It is challenging to maintain a uniform height among the polysilicon gates in different areas of an IC. The variations in the polysilicon gates' heights present issues for subsequent replacement gate processes.